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Output voltage regulation is obtained by modulating the operating frequency. A fixed deadtime inserted between the turn-OFF of one switch and the turn-ON of the other one guarantees soft-switching and enables high-frequency operation.
To drive the high-side switch with the bootstrap approach, the IC incorporates a high-voltage floating structure able to withstand more than V with a synchronous-driven high-voltage DMOS that replaces the external fast-recovery bootstrap diode. The IC enables the designer to set the operating frequency range of the converter by means of an externally programmable oscillator. At start-up, to prevent uncontrolled inrush current, the switching frequency starts from a programmable maximum value and progressively decays until it reaches the steady-state value determined by the control loop.
This frequency shift is non linear to minimize output voltage overshoots; its duration is programmable as well. The IC can be forced to enter a controlled burst-mode operation at light load, so as to keep converter’s input consumption to a minimum. IC’s functions include a not-latched active-low disable input with current hysteresis useful for power sequencing or for brownout protection, a current sense input for OCP with frequency shift and delayed shutdown with automatic restart.
A higher level OCP latches off the Satasheet if the first-level protection is not sufficient to control the primary current. Their combination offers complete protection against overload and short circuits. An interface with the PFC controller is provided that enables to switch off the pre-regulator during fault conditions, such as OCP shutdown and DIS datashewt, or during burst-mode operation.
Functions Pin functions Name Function Soft start.
This pin connects an external capacitor to GND and a resistor to RFmin pin 4 that set both the maximum oscillator frequency and the time constant for the frequency shift that occurs as the chip starts up soft-start.
Delayed shutdown upon overcurrent. A capacitor and a resistor are connected from this pin to GND to set both the maximum duration of datqsheet overcurrent condition datasheeet the IC stops switching and the delay after which the IC restarts switching. Every time the voltage on the ISEN pin exceeds 0. A current generator and is slowly discharged by the external resistor. Datsaheet the voltage on the pin reaches 2 V, the soft start capacitor is completely discharged so that the switching frequency is pushed to its maximum value and the ?
A is kept always on. As the voltage on the pin exceeds 3.
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The IC will be soft-restarted as the voltage drops below 0. In this way, under short circuit conditions, the converter will work intermittently with very low input average power.
A capacitor connected from this pin to GND is charged dqtasheet discharged by internal current generators programmed by the external network connected to pin 4 RFmin and determines the switching frequency of the converter.
Pin settings Pin functions continued Name Function Minimum oscillator frequency setting. This pin provides a precise 2 V reference and a resistor connected from this pin to GND defines a current that is used to set the minimum oscillator frequency. To close the feedback loop that regulates the converter adtasheet voltage by modulating the oscillator frequency, the phototransistor of an optocoupler will be connected to this pin through a resistor. The value of this resistor will set the maximum operating frequency.
An R-C series connected from this pin to GND sets frequency shift at start-up to prevent excessive energy inrush soft-start. The pin senses some voltage related to the feedback control, which datasheft compared to an internal reference 1. If the voltage on the pin is lower than the reference, the IC enters an idle state and its quiescent current is reduced. The chip restarts switching as the voltage exceeds the reference by 50 mV. Soft-start is not invoked. This function realizes burst-mode operation when the load falls below a level that can be programmed by properly choosing the resistor connecting the optocoupler to pin RFmin see block diagram.
Tie the pin to RFmin if burst-mode is not used. The pin senses the primary current though a sense resistor or a capacitive divider for lossless sensing. This input is not intended for a cycle-by-cycle control; hence the voltage signal must be filtered to get average current information.
As the voltage exceeds a 0. Under output short circuit, this normally results in a nearly constant peak primary current. This condition is allowed for a maximum time set at pin 2.
If the current keeps on building up despite this frequency increase, a second comparator referenced at 1. The information is latched and it is necessary to recycle the supply voltage of the IC to enable it to restart: Tie the pin to GND if the function is not used. The pin is to be connected to the high-voltage input bus with a datasheet divider to perform either AC or DC in systems with PFC brownout protection.
L Datasheet(PDF) – STMicroelectronics
A voltage below 1. The comparator is provided datashedt current hysteresis: A current generator is ON as long as the voltage applied at the pin is below 1. Bypass the pin with a capacitor to GND to reduce noise pick-up.
The voltage on the pin is top-limited by an internal zener. Activating the zener causes the IC to shut down not latched. Bias the pin between 1. Internally the pin connects a comparator that, when the voltage on the pin exceeds 1.
This pin, normally open, is intended for stopping the PFC controller, for protection dztasheet or during burst-mode operation. During UVLO, it is open. Leave the pin unconnected if not used. Current return for both the low-side gate-drive current and the bias current of the IC. All of the ground connections of the bias components should be dztasheet to a track going to this pin and kept separate from any pulsed current return.
The driver is capable of 0. Supply Voltage of both the signal part of the IC and the low-side gate driver. Sometimes a small bypass capacitor 0. The pin is not internally connected to isolate the high-voltage pin and ease compliance with safety regulations creepage distance on the PCB.
High-side gate-drive floating ground. Current return for the high-side gate-drive current. Layout carefully the connection of this pin to avoid too large spikes below ground. High-side floating gate-drive output. High-side gate-drive floating supply Voltage. The bootstrap capacitor connected between this pin and pin 14 OUT is fed by an internal synchronous bootstrap diode driven in-phase with the low-side gate-drive.
This patented structure replaces the normally used external diode. ESD immunity for pins 14, 15 and 16 is guaranteed up to V 4. A mA mA Iq Residual consumption ?